Principal Applications Engineer, Transistor-Level Signoff

We Are Synopsys is the leader in engineering solutions from silicon to systems, enabling customers to rapidly innovate AI-powered products. We deliver industry-leading silicon design, IP, simulation and analysis solutions, and design services. We partner closely with our customers across a wide range of industries to maximize their R&D capability and productivity, powering innovation today that ignites the ingenuity of tomorrow. You Are You have spent years deep in the trenches of transistor-level power integrity and EM/IR signoff, solving complex problems that can directly impact a customer's tapeout schedule. You understand what it takes to analyze challenging IR drop and electromigration issues, identify their root causes, and drive them toward practical resolution. You know the difference between a methodology that works on paper and one that holds up in real-world analog, mixed-signal, ESD, and high-speed interface designs. You recognize patterns before they become critical signoff proble ms, and you are the engineer customers trust wh en complex power integrity and EM/IR challenges put their signoff schedule at risk. You do not just answer questions. You help engineers understand how to approach power integrity and EM/IR problems systematically and build the confidence to solve them. Mentoring a junior engineer through a complex IR drop analysis or walking a customer's design team through a new signoff flow feels as important to you as solving the technical problem itself. You move comfortably between deep technical investigation and strategic customer conversations, and you know when to dig deeper yourself, collaborate across teams, or escalate to R&D to drive an issue toward resolution. At Synopsys, you will work with customers pushing the limits of advanced nodes, multi-die integration, and custom IC design. The problems are real, the stakes are high, and what you build and teach will shape how teams signoff their most critical designs. What You'll Be Doing Own technical relationships with assigned customer accounts, serving as the primary technical contact for Totem and Totem-SC engagements, driving adoption, methodology development, and issue resolution Lead transistor-level power integrity and EM/IR signoff work across analog, RF, ESD, embedded memory, and high-speed interface designs , helping customers analyze complex design issues, validate results, and establish robust signoff methodologies. Develop, validate, and optimize customer signoff flows for advanced nodes and 3DIC designs, including scripting in Python, Tcl, Perl, or Shell to automate workflows and improve scalability Drive complex technical investigations from initial customer reports through root-cause analysis and resolution, coordinating with R&D and internal teams to deliver technically sound and sustainable solutions. Lead technical evaluations, benchmarks, workshops, and training sessions, partnering with Sales to expand product adoption and identify growth opportunities Mentor applications engineers on signoff methodology, power-integrity analysis, and customer engagement, establishing reusable best practices and technical standards Collaborate with Product Management and R&D to influence product roadmap based on real customer use cases, technical gaps, and emerging signoff requirements The Impact You Will Have Enable customers to successfully tape out advanced node and 3DIC designs by delivering robust, scalable power integrity and EM/IR signoff methodologies Reduce customer time-to-signoff through automation, scripting, and workflow optimization that directly improves engineering productivity Accelerate Totem and Totem-SC adoption across new customer accounts and design teams, expanding the technical footprint and business impact Improve product quality and capability by surfacing real customer issues, use cases, and methodology gaps that shape R&D priorities Build technical expertise across the applications team through mentorship, documenta