Analog Design, Sr Staff Engineer

We Are Synopsys is the leader in engineering solutions from silicon to systems, enabling customers to rapidly innovate AI-powered products. We deliver industry-leading silicon design, IP, simulation and analysis solutions, and design services. We partner closely with our customers across a wide range of industries to maximize their R&D capability and productivity, powering innovation today that ignites the ingenuity of tomorrow. You Are You bring extensive experience in analog and mixed-signal design, with a proven ability to deliver circuits that perform reliably across process corners, temperature variations, and real-world operating conditions. Your work extends beyond meeting specifications to ensuring robust performance in demanding applications including data centers, AI accelerators, and networking platforms. You approach design through systematic tradeoff analysis, balancing power, performance, area, yield, and time-to-market considerations. Your technical decisions are grounded in data and validated through silicon results. In design reviews, you contribute clarity and insight that advances technical discussions and resolves complex challenges. Technical mentorship is central to your professional practice. You guide engineers through circuit analysis, layout considerations, and jitter budgeting with a focus on building their independent problem-solving capabilities. Your leadership is exercised through technical expertise and collaborative influence rather than formal authority. At Synopsys, you will contribute to the development of PCIe Gen7/Gen8 and advanced SerDes architectures that enable AI and cloud computing infrastructure. You will work within a global engineering organization on high-speed connectivity solutions with direct impact on next-generation systems. What You'll Be Doing Design and deliver critical analog and mixed-signal circuit blocks including PLLs, CDRs, equalization circuits, ADCs, DACs, and clocking systems for high-speed SerDes and PHY products Conduct architecture exploration and tradeoff analysis for next-generation connectivity IP supporting PCIe Gen7/Gen8, AI, and networking applications Execute transistor-level design, simulation, and optimization with focus on performance, power consumption, jitter, and signal integrity Provide technical mentorship to engineering staff on circuit design techniques, debugging methodologies, and industry best practices Collaborate with layout, verification, digital design, and system engineering teams to ensure successful integration of mixed-signal subsystems Support silicon bring-up, characterization, and root-cause analysis in coordination with laboratory and customer engineering teams The Impact You Will Have Your circuit innovations will enable improved data rates and power efficiency in products deployed across AI and data center applications The architectures you develop will inform Synopsys IP roadmaps and influence strategic technology decisions Your mentorship will elevate engineering capabilities and establish higher standards of technical excellence across project teams Your methodology contributions will improve simulation efficiency and increase first-pass silicon success rates The SerDes and PHY intellectual property you deliver will serve as foundational building blocks across multiple product generations Your participation in design reviews will identify critical issues early in the development cycle and reduce risk of costly design iterations What You'll Need Bachelor's or Master's degree in Electrical Engineering, Electronics Engineering, or related technical discipline Minimum 10 years of professional experience in analog and mixed-signal integrated circuit design with demonstrated success delivering complex products through silicon validation Extensive expertise in the design of high-performance SerDes, PLLs, CDRs, PHYs, ADCs, DACs, equalization circuits, or clocking systems Strong technical foundation in transistor-level design, noise