R&D Engineering, Sr. Staff Engineer-19038

We Are: At Synopsys, we drive the innovations that shape the way we live and connect. Our technology is central to the Era of Pervasive Intelligence, from self-driving cars to learning machines. We lead in chip design, verification, and IP integration, empowering the creation of high-performan ce silicon chips and software content. Join us to transform the future through continuous technological innovation. You Are: You are a visionary and highly experienced engineering professional, passionate about verification and digital design methodologies. You thrive in challenging environments and are adept at architecting robust verification infrastructure s from the ground up, particularly within the EDA ecosystem. What You’ll Be Doing: * Applying AI techniques to accelerate design verification - leveraging internal and/or external agentic AI tools to generate verification plan, testcases, coverage and debug collaterals * Implementing reference and unified verification flows for Synopsys digital IP products using leading EDA tools such as VCS, Verdi, VMS Execution Manager, Verdi Planner (HVP), and VIPs. * Building robust, scalable verification infrastructure s from the ground up to support diverse and complex IP and SoC projects. * Partnering with global engineering teams to define, document, and propagate best-in-class verification methodologies and standards. * Leading and mentoring junior engineers, fostering a culture of technical growth, innovation, and collaboration within the team. * Driving technical initiatives and independently managing high-impact assignments, ensuring timely and high-quality deliverables. * Collaborating closely with tool development teams to influence product evolution and optimize verification workflows for maximum efficiency. * Supporting customers and internal stakeholders by troubleshootin g, optimizing, and refining verification processes and flows. What You’ll Need: *Hands-on experience in IP/SoC verification, with a proven track record of hands-on technical contributions. *Good understanding of Agentic AI technologies specifically Cursor and/or VS Code co-pilot. *Passion to learn Agentic AI mechanisms and apply them for design verification. *Familiarity with Synopsys verification tools such as VCS, Verdi, VMS Execution Manager, Verdi Planner (HVP), and VIPs. *Demonstrated ability to validate verification flows and infrastructure for complex digital designs. *Exposure to Agentic AI EDA tools will be a big plus. *Solid programming and scripting skills ( SystemVerilog, UVM, Tcl, Python or similar languages). *Bachelor’s or Master’s degree in electrical/Ele ctronics/Compu ter engineering *Experience with multi-tasking and managing technical projects independently. *Ability to document, communicate, and propagate technical methodologies across global teams. The Impact You Will Have: * Elevate Synopsys’ digital IP verification capabilities by delivering robust, unified, and scalable methodology solutions. * Accelerate time-to-market for high-performan ce silicon products by streamlining and standardizing verification processes. * Empower global verification teams with best-in-class flows, tools, and practices, driving consistent project success. * Shape the verification strategy for next-generatio n Synopsys IP and SoC offerings, directly influencing product quality and customer satisfaction. * Mentor and develop the next wave of verification engineers, fostering a culture of learning and technical excellence. * Contribute to the evolution of Synopsys’ EDA tool ecosystem by providing critical feedback and championing innovative solutions. * Enhance Synopsys’ leadership position in the semiconductor industry through continuous improvement and adoption of cutting-edge verification methodologies. Who You Are: * Innovative problem solver who thrives in dynamic, fast-paced environments. * Excellent communicator, able to distill complex technical topics for diverse audiences. * Natural mentor and team player,