Applications Engineering, Sr Staff Engineer (Static Timing Analysis)

We Are Synopsys is the leader in engineering solutions from silicon to systems, enabling customers to rapidly innovate AI-powered products. We deliver industry-leading silicon design, IP, simulation and analysis solutions, and design services. We partner closely with our customers across a wide range of industries to maximize their R&D capability and productivity, powering innovation today that ignites the ingenuity of tomorrow. You Are You have spent years deep in the timing closure trenches, and you know that the difference between a chip that tapes out on schedule and one that slips six months often comes down to someone who understands both the tool and the real design problem underneath. You have seen PrimeTime from every angle: competitive evals where you had to prove superiority in two days, tape-out firefights at 2 AM, and those strategic conversations where a VP needs to understand why their timing methodology needs to change. You do not just run the tool. You understand setup and hold violations in the context of process corners, you can debug a crosstalk issue that is hiding in a specific mode, and you know when a timing problem is actually a synthesis problem or an extraction artifact. When a customer's design team is stuck, you can look at their reports, ask three targeted questions, and find the path forward. You are equally comfortable sitting with an engineer walking through TCL debug and presenting to a director explaining why their current flow is leaving performance on the table. You have learned that the best technical win is the one where the customer feels like they discovered it with you, not that you sold them something. At Synopsys, you will work with the teams building the most advanced chips in the world, and what you help them solve actually matters. What You'll Be Doing Drive PrimeTime adoption and deployment at customer sites, from initial competitive benchmarks through production tape-out support across advanced node designs Lead technical evaluations that demonstrate PrimeTime's advantages over competing STA tools, translating runtime, capacity, and accuracy metrics into clear business value for design teams and management Provide hands-on support during critical design phases, including timing closure, ECO iterations, and sign-off, working directly with customer engineers to resolve complex timing, SI, and variation issues Develop and deliver technical training on PrimeTime workflows, covering timing constraints, multi-mode multi-corner analysis, variation modeling, and integration with synthesis and physical design flows Collaborate with R&D to communicate customer requirements, reproduce field issues, and influence product roadmap based on real design challenges you see in the field Build and maintain TCL-based automation scripts and methodologies that improve customer productivity and demonstrate best practices for timing analysis workflows Act as the technical bridge between customers, sales, marketing, and engineering, translating customer pain points into actionable product feedback and solution strategies The Impact You Will Have Enable customers to tape out complex SoCs on schedule by resolving timing bottlenecks that would otherwise cause costly respins or schedule slips Expand PrimeTime footprint at strategic accounts by proving technical superiority in head-to-head evaluations, directly contributing to revenue growth and competitive wins Accelerate customer productivity by delivering training and methodology improvements that reduce timing closure cycles from weeks to days Shape future PrimeTime capabilities by channeling real-world design challenges back to R&D, ensuring the product evolves to meet next-generation design requirements Build deep technical credibility with customer design teams and management, becoming the trusted advisor they turn to when timing issues threaten project milestones Reduce support escalations by developing reusable scripts, documentation, and best pract